Driving High Resolution Sigma-Delta Measurement ADCs

Thursday, November 22nd, 2018 - Digital Electronics

Driving High Resolution Sigma-Delta Measurement ADCs

The AD77XX family of ADCs is optimized for high resolution (16–24 bits) low frequency transducer measurement applications.

  • Resolution: 16 – 24 bits
  • Input signal bandwidth: <60Hz
  • Effective sampling rate: <100Hz
  • Generally Sigma-Delta architecture
  • Designed to interface directly to sensors (< 1 kΩ) such as bridges with no external buffer amplifier (e.g., AD77XX – series)
    – On-chip PGA and high resolution ADC eliminates the need for external amplifier
  • If buffer is used, it should be precision low noise (especially 1/f noise)
    – OP177
    – AD707
    – AD797

Some members of this family, such as the AD7730, have a high impedance input buffer which isolates the analog inputs from switching transients generated in the front-end programmable gain amplifier (PGA) and the sigma-delta modulator. Therefore, no special precautions are required in driving the analog inputs. Other members of the AD77XX family, however, either do not have the input buffer, or if one is included on-chip, it can be switched either in or out under program control. Bypassing the buffer offers a slight improvement in noise performance.

The equivalent input circuit of the AD77XX family without an input buffer is shown below. The input switch alternates between the 10pF sampling capacitor  and ground. The 7kΩ internal resistance, RINT, is the on-resistance of the input multiplexer. The switching frequency is dependent on the frequency of the input clock and also the internal PGA gain. If the converter is working to an accuracy of 20-bits, the 10pF internal capacitor, CINT, must charge to 20-bit accuracy during the time the switch connects the capacitor to the input. This interval is one-half the period of the switching signal (it has a 50% duty cycle). The input RC time constant due to the 7kΩ resistor and the 10pF sampling capacitor is 70ns. If the charge is to achieve 20-bit accuracy, the capacitor must charge for at least 14 time constants, or 980ns. Any external resistance in series with the input will increase this time constant.

Driving High Resolution Sigma-Delta Measurement ADCs,sigma delta adc measurement

  • REXT Increases CINT Charge Time and May Result in Gain Error
  • Charge Time Dependent on the Input Sampling Rate and Internal PGA Gain Setting
  • Refer to Specific Data Sheet for Allowable Values of REXT to Maintain Desired Accuracy
  • Some AD77XX-Series ADCs Have Internal Buffering Which Isolates Input from Switching Circuits

There are tables on the datasheets for the various AD77XX ADCs, which give the maximum allowable values of REXT in order to maintain a given level of accuracy. These tables should be consulted if the external source resistance is more than a few kΩ.

Note that for instances where an external op amp buffer is found to be required with this type of converter, guidelines exist for best overall performance. This amplifier should be a precision low-noise bipolar-input type, such as the OP177, AD707, or the AD797.

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